Forums:
i want to perform static code analysis using PSoC Creator 4.0, please suggest some wayouts for this task.
↧
static code analysis using PSoC Creator 4.0
↧
Difference between CY8C4247LQI-BL493 and CY8C4247LQI-BL483
Forums:
Hi everyone,
I would like to know if the only difference between CY8C4247LQI-BL493 and CY8C4247LQI-BL483 is the CapSense characteristics. I need to know if the same code can run in both MCU without any problem (I don't use the Capsense). Searching the CY8C4247LQI-BL483 in the search box of the cypress main web page, if you click on the datasheet link you're redirected to the 4XX7_BLE family datasheet, meanwhile if you do the same thing with the CY8C4247LQI-BL493 you're redirected to the 4XX8_BLE family datasheet. Is this a mistake in the link?
Thanks in advance.
↧
↧
Problems using UART
Forums:
I had problems using a 115200 baud UART on different states of the BLE Stack Event Handler. I have debug messages in every state and in some state I need to send some info over the UART. Sometimes when I write about 10-15 bytes, one character sent is changed by another one. Making a step by step debugging I can see that there's not corrupted memory. Also I know that it's not noise over the tx line of the UART. This issue is fixed adding a 1ms delay on the main infinite loop. Any idea of what is the cause of this behaviour and why this delay fixes it?
Thanks in advance.
↧
External clock for a timer
Forums:
I want connect an external clock (16 MHz) to a TCPWM for better accuracy. But I can't get it right.
I connected the external clock to Pin [0.6] and mapped it in the "configure system clock" - window to EXTCLK.
In the same window I routed the EXTCLK to "Routed2" and was then able to configure the clock-component in the TopDesign to the existing clock "Routed2".
I get the error:
Pin guidance unavailable: Invalid connection for clock input "\IVC_S1_Timer:cy_m0s8_tcpwm_1\:clock" driven from "ClockBlock:dsi_in_1". The component requires a clock from the clock block.
I tried also another pin and configured and routed it as "DigitalSignal" with the same result.
Is there somewhere a tutorial on how to use an external clock with PSoC 4?
What is a "clock from the clock block"?
Thanks
Thomas
↧
Restarting DMA
Forums:
I'm using the CY8C4247AZI-M485 to generate tones with the IDAC and DMA components. I can create a custom sequence of tones. The total duration of my sequence is 125 ms. I repeat the sequence every second for a "beeping" effect. I can initiate the beeping with a CAN message and I can stop it with a CAN message. The problem I'm having is starting it again. I have a feeling I'm not resetting my DMA channels properly. What is the proper way to reset the DMAs?
Attachments:
↧
↧
i2c udb on psoc4
Forums:
The datasheets seem to suggest that I can setup i2c on a udb but that option is not available in the component catalog. I'm using CY8C4245AXI-483.
↧
PsOC4 Project - Alarm Loop
Forums:
As part of my current education as an Electronic Engineer, I am currently attending a course in Embedded Systems. For this course, we are required to complete several projects concerning the PSoC4 Pioneer Kit and multiple Shields (including the Arduino MultiFunctionShield); my final assignment for this course is to simulate an alarm system, which must be monitored via at least three methods (see below). However, I am currently experiencing several recurring problems, which have caused me to restart my project multiple times.
As such, I thought it might prove fruitful to ask for your advice concerning the project. To be specific, the hard requirements for the project are as follows:
- The system has to detect/simulate the status of the loop via three methods; the Capsense present on the PSoC4 (loop 1), the PotMeter present on the Shield (loop 2) and an additional slider which has to be configured on the Shield via Input Gate A5 (loop 3).
- In each loop, five specific voltage/current intervals have been defined. As these are applied in relation to a 5V power supply, these are as follows:
1; Sabotage 1 --> 2,483 V - 4,999 V
2; Alarm open --> 2,246 V - 2,482 V
3; Sabotage 2 --> 1,345 V - 2,245 V
4; Alarm active --> 1,161 V - 1,283 V
5; Sabotage 3 --> 0,001 V - 1,160 V
- If Key 1 on the Shield is pressed, the RGB-LED on the PsOC4 has to turn Green after a 10-second delay; As long as this is not the case, the RGB-LED has to turn Blue, EXCEPT when any of the loops is subject to Sabotage. In case of Sabotage, the RGB-LED has to turn Red and the Buzzer on the Shield has to produce a continuous signal, which can be turned of by pressing Key 2 on the Shield. Once all loops are in correct current ranges (either Alarm open or Alarm active), the Buzzer has to turn off automatically and the RGB-LED has to turn Blue once again.
- Each of the specified areas has to produce specific visual messages via the 7-segmentsdisplays (present on the Shield), as well as turning on LED's on the shield in binary code. These messages/LED's are as follows:
1; Sabotage 1 --> "S1" --> LED1
2; Alarm open --> "OPEN" --> None
3; Sabotage 2 --> "S2" --> LED2
4; Alarm active --> "AAN" --> None
5; Sabotage 3 --> "S3" --> LED3
- When sabotage is detected, the display has to be followed by a space, after which the respective loop is also displayed. Each of the aforementioned visual messages must be displayed for exactly the duration of 1 second, which is followed by the actual Voltage meassured in that specific loop (varying between 0,000 V and 5,000 V); the programme itself continuously alternates between each of the three loops.
FOR EXAMPLE: when the PotMeter is adjusted to create 1,500 V, the text "S2 2" is displayed; Exactly one second later, the text 1.500 is displayed; afterwards, the correct message for loop 3 (the slider) is displayed, after which the correct voltage is displayed; the same follows for loop 1 (CapSense), and so forth. I have been able to construct the necessary components and Pin Configuration for the project (see the attached project). It is mainly, and perhaps purely, the software programme itself that presents the challenges I can't seem to overcome.
As such, the realisation of the system presents the following challenges;
I. To construct a scanning-program that puts data obtained via inputs in array(s).
II. To create a display-programme that can relay data from the array(s) dynamically per second.
III. Loop both programmes continuously.
IV. Control the 7-segmentsdisplays with the help of an interrupt-routine.
Additional Requirements:
- Incorporation of a Deep Sleep Mode into the system --> By pressing both Key 1 and Key 2 simultaneously for three seconds, the system has to put itself into Deep Sleep Mode to preserve energy; after pressing both buttons for three seconds once again, Deep Sleep Mode is lifted and the system functions normally.
- Incorporate Hard Reset into the system --> by pressing the Reset-button, the user has to be able to completely reset the entire system.
As an enthousiast technician (who seriously attempts to obtain as much knowledge in as little time as possible), I sincerely hope you might be able to help me in creating the project. Sincerely and many, many thanks in advance.
↧
LSM6DS3
Forums:
Hey, I'm trying to use the Accelerometer and the Gyroscope on the LSM6DS3 Sensor. Is there a way to read a register directly with the psoc library? I'm unsure of how to poll for a specific addresses stored info.
Thanks in advance!
↧
How do you wake up from DeepSleep using GPIO pin
Forums:
Does anybody know how to wake up the PSOC4 from deep sleep using a button press? I know were supposed to use the global signal reference component from reading in the forum but, I'm not sure how to use it. Also, do we treat it like a normal interrupt in the code.
↧
↧
one I2C (SCB) on two different output ports
Forums:
Is it possible to connect a I2C configured SCB Block to two different output ports?
I know it makes not much sense in terms of design, however I made a routing mistake on the PCB and now two I2C Slaves are not connected to one port but to two different ones. As I'm running out of SCB's and UDB's my only chance right now is to make a connection between the both by manual hardwires which I'd like to avoid.
In detail: I'd like to connect P7.0/P6.4 as SCL and P7.1/P6.5 as SDA on a CY8C4245AXI-M445
Regards,
Andreas
↧
Using 32.768 Crystal Oscillator with Timer Counter
Forums:
Hello,
I am new to the PSoC environment and working on a project that requires very high precision. I wish to use the more precise 32.768 kHz oscillator on the CY8C424LQQ-BL583 to do the timing for an interrupt. Currently I am using the high frequency clock as an input to the Timer block and it works fine. After enabling the WCO I see no option for changing the source of the clock input (to the Timer), other than HFCLK. I see that the RTC can be used with the WCO clock and could create an interrupt to work but would involve rewriting a lot of the project.
Thanks in advance!
↧
Error to enable notification
Forums:
Hello Community,
I want to write to my server 0x01 to activate the notifications, but when I send the command i got an error:
CYBLE_ERROR_INVALID_OPERATION
The strange part is when I try to write again, the code works, Im able to to print out the value from the server on my computer via master UART.
I attached the file
thanks David C
Attachments:
↧
Discussion regarding programming and debuging
Forums:
Hi, I have designed a PCB board with CYBLE-214009 module and need to program and debug the module with SWD interface.Two pins are assigned for programming and debuging P0[7] (SCLK)and P0[6](SDAT) respectively on board. I am not able to program the module on custom pcb board. I am usingCY8CKIT-002 PSOC MINIPROG3 PROGRAM AND DEBUG KIT.
Pins assigned in BLE module with MINIPROG3 PROGRAM AND DEBUG KIT:-
1 - VDD
2- GND
3- XRES
4- SCLK P0[7]
5- SDAT P0[6]
↧
↧
PSoC4 errata? (aka: "I found bugs, are there more?")
Forums:
So, where is the errata sheet for PSoC4000? I've searched the site high and low, and found nothing. Despite that, I already found some actual bugs:
- Documentation for the SROM syscall to setup clocks is wrong (TRM "Document No. 001-89309 Rev. *C" page 144). Docs say that this syscall takes a pointer to memory, and there I write param. This never works. Passing the actual param directly (like for "checksum" system call) in SYSARG register does work.
- Either documentation for SPCIF_GEOMETRY is wrong, or the chip has a bug where it reports the wrong value. My CY8C4013SXI-400 (which has 8K of flash) reports this register's value as 0x0001003f. As per register doc sheet (Document No. 001-90002 Rev. *C) that means it has (0x3f + 1) * 256 = 16384 bytes of flash. Of course in reality the chip has 8 (and as a test, I do indeed get a fault if I read past 8K)
- If I use the "Load Flash Bytes" SROM syscall shortly after boot, and point it to an area of flash where i put in the proper params to load 64 bytes of data into the write latches (0x0000d7b6, 0x0000003f) but I DO NOT WRITE THE NEXT 16 WORDS (let's assume i am ok writing whatever garbage was there into flash) , SROM locks up (actual cortex-m0 core lockup bit set and all). However, if those same words of RAM have ever been written before since boot (by core or by the MEMAP) no lockup occurs. (Yes, flash clock is properly set up. Yes, literally writing zeroes or any other values to these bytes immediately before or long before the syscall makes it work properly/)
Given all this, I am guessing at least a few more issues exist. is there a list?
↧
pSoc4 tccpwm asymmetric pwm
Forums:
Attempting to generate a sequence of variable width pulses using the PWM component configured for asymmetric align.
Here is the configuration of the module
Prescaler - 1x
PWM Align - Asymmetric Align
PWM mode : PWM
Interrupt on Terminal count
Period Register = 50, Period Register Buf = 206, swap is checked
Compare Register = 10, Compare Register Buf = 103 swap is checked
(See Capture.png attached)
According to pSocCreator I should get a waveform that looks like capture2.png attached.
Instead I see continuously a waveform that appears to be based only on the initially configured period and compare values so it looks like the swap is not working. The module datasheet indicates that the swap event can be generated in software and the swap will occur on the next TC event. I tried using the void TCPWM_SetPeriodSwap(uint32 swapEnable) and void TCPWM_SetCompareSwap(uint32 swapEnable) api's to (re)enable the swapping at each TC interrupt but this does not impact the generated waveform.
Please advise on how to utilize the swapping function of the PWM component....
Thanks
Jim
Attachments:
↧
Connection up to 7 slaves
Forums:
Hello, I´ve read that the CY8CKIT-042-BLE can handle only 4 slave connections, I´wondering if it
is other chip of Cypress can handle the maximum slaves, 7 plus one master.
Thanks
↧
I need help with the configuration of the ota
Forums:
I tried to do the ota according to the documents of the laboratory that i have and let here but these are focused on BLE as well as its libraries however I wish to do it through UART Could help me with this I send my workspace so that they could guide me how I must continue to achieve this.
Attachments:
↧
↧
Help! I've run out of PsoC4 control cells!
Forums:
OK, so I'm trying to do a PSoC4 BLE device that has a fair number of blocks, and I seem to have run out of control cells. I'm using a SCB UART, SCB I2C and UDB SPI, the SARMUX ADC, 2 op amps and the 4.2 BLE Stack. I'm trying to add switchable gain by adding 2 AMUXes, but when I do that, the placer fails with no useful error messages (i.e. it just says "the placer has failed" and refers me to the placer section of the .rpt file which, of course, just says the same thing). If I remove one of the AMUXes, it works, and the rpt file shows control cells at 100%.
If I replace the AMUXes with hardware AMUXes and tie the select line to ground, it builds, but then I'd need to add a control register block so I can affect the select line, and when I do that, I still run out of control cells.
So my conclusion is that I've run out of control cells.
I can use virtualMuxes and have two versions of the firmware, but it seems ridiculous to OTAP 100K+ of Flash in order to just reconfigure the switching fabric. I'm guessing if I dig deep enough into the TRM, I can figure out how to do that via registers... but if it's as simple as that, why can't I do it dynamically via a switchable virtual MUX block?
Or is there some other way somebody can think of to recover control cells, or avoid needing them?
Thanks!
↧
Bootloader Host / UART Bootloader host do not reset device after flashing of bootloadable
Forums:
Hello community,
i have two projects, one with only a Bootloader and UART(SCB) component and one with my application and the Bootloadable component.
All works fine, but if i flash my application with the "Bootloader Host" tool shipped with "PSoC Creator" or the "UART Bootloader Host" executable (AN68272), i have to reset my device manually after successful flashing.
My final device should not have a reset button or any other button, only CapSense.
If i look to the file "cybtldr_command.h" in "cybootloaderutils" there is a command called "CMD_EXIT_BOOTLOADER".
Is this command not implemented in the tools i mentioned above?
Have i develop a executable by myself to use the exit command after successful flashing?
↧
Multithreading for PSOC 4200M Family
Forums:
Hello,
I am working on a project using CY8C4247AXI-M485 PSoC controller,which requires multithreading concept.Does this controller support multithreading,if so please suggest me some reference.
↧